Patent attributes
A GaN digital circuit is disclosed. The circuit includes a first output node on a substrate, a pull up switch connected to a first output node and a power supply node having a second voltage, a capacitor having a first terminal configured to cause the voltage at the gate of the pull up switch to increase to substantially the sum of the second voltage and a third voltage in response to the voltage at the first output node increasing to the second voltage. The circuit also includes a first depletion mode charging switch configured to cause a voltage at the first terminal of the capacitor to become substantially equal to the third voltage while the voltage at the first output node is substantially equal to the first voltage and is configured to be substantially nonconductive while the voltage at the first output node is substantially equal to the second voltage.
