Is a
Patent attributes
Patent Applicant
Current Assignee
Patent Jurisdiction
Patent Number
Date of Patent
November 5, 2019
Patent Application Number
15845005
Date Filed
December 18, 2017
Patent Citations Received
Patent Primary Examiner
Patent abstract
A method for control of latency information through logical block addressing is described comprising receiving a computer command, performing a read flow operation on a computer buffer memory based on the computer command; populating at least one metadata frame with data based on logical block address latency information; initiating a serial attached data path transfer for one of transmitting and receiving data to the computer drive and transmitting data to a host based on the second latency.
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