Is a
Patent attributes
Patent Applicant
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Satish Damaraju0
Steven Hsu0
Amit Agarwal0
Ram Krishnamurthy0
Simeon Realov0
Date of Patent
November 12, 2019
0Patent Application Number
158460470
Date Filed
December 18, 2017
0Patent Citations Received
Patent Primary Examiner
Patent abstract
An apparatus is provided which comprises: a multi-bit quad latch with an internally coupled level sensitive scan circuitry; and a combinational logic coupled to an output of the multi-bit quad latch. Another apparatus is provided which comprises: a plurality of sequential logic circuitries; and a clocking circuitry comprising inverters, wherein the clocking circuitry is shared by the plurality of sequential logic circuitries.
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