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US Patent 10475812 Three-dimensional vertical NOR flash thin-film transistor strings

OverviewStructured DataIssuesContributors
Is a
Patent
Patent
Date Filed
June 20, 2019
Date of Patent
November 12, 2019
Patent Application Number
16447406
Patent Citations Received
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US Patent 11515309 Process for preparing a channel region of a thin-film transistor in a 3-dimensional thin-film transistor array
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US Patent 12114474 Integrated memory comprising secondary access devices between digit lines and primary access devices
0
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US Patent 11508445 Capacitive-coupled non-volatile thin-film transistor strings in three dimensional arrays
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US Patent 11508693 High capacity memory module including wafer-section memory circuit
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US Patent 11507301 Memory module implementing memory centric architecture
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US Patent 12073082 High capacity memory circuit with low effective latency
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US Patent 12105650 Quasi-volatile system-level memory
0
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US Patent 11488676 Implementing logic function and generating analog signals using NOR memory strings
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US Patent 10608011 3-dimensional NOR memory array architecture and methods for fabrication thereof
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US Patent 10720448 Three-dimensional vertical NOR flash thin-film transistor strings
•••
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
10475812
Patent Primary Examiner
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Harry W Byrne

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