US Patent 10490521 Advanced structure for info wafer warpage reduction

A package (e.g., a wafer level package (WLP)) including one or more redistribution layers to fan out the contact pads of the one or more dies within an integrated circuit structure. An example package includes a die having a contact pad exposed at a frontside thereof. The package also includes a redistribution layer disposed over the frontside of the die. The redistribution layer includes metallization extending through a nano-composite material, which may be formed from a dielectric material with a nano-filler material disposed therein. The metallization is electrically coupled to the contact pad of the die. By incorporating the nano-composite material in the redistribution layer, the coefficient of thermal expansion (CTE) of the redistribution layer more closely matches the CTE of the die, which prevents or eliminates undesirable warpage of the redistribution layers.