Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Siva Kanakasabapathy0
John R. Sporre0
Laertis Economikos0
Ruilong Xie0
Andrew Greene0
Chanro Park0
Date of Patent
December 10, 2019
Patent Application Number
15897204
Date Filed
February 15, 2018
Patent Citations Received
Patent Primary Examiner
Patent abstract
Gate isolation methods and structures leverage the formation of a sidewall spacer layer within a recess formed in an organic planarization layer. The spacer layer enables precise alignment of the cut region of a sacrificial gate, which may be backfilled with an isolation layer. By forming the isolation layer after a reliability anneal of the gate dielectric and after formation of a first work function metal layer, both the desired critical dimension (CD) and alignment of the isolation layer can be achieved.
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