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US Patent 10528643 Vector-matrix multiplication using non-volatile memory cells

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
Date Filed
August 1, 2018
Date of Patent
January 7, 2020
Patent Application Number
16052420
Patent Citations Received
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US Patent 12079733 Multi-precision digital compute-in-memory deep neural network engine for flexible and energy efficient inferencing
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US Patent 11515472 Multi-resistance MRAM
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US Patent 11521682 Temperature compensation in an analog memory array by changing a threshold voltage of a selected memory cell in the array
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US Patent 11521658 Binary weighted voltage encoding scheme for supporting multi-bit input precision
0
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US Patent 11449740 Synapse circuit with memory
0
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US Patent 11934798 Counter-based multiplication using processing in memory
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US Patent 11934480 NAND block architecture for in-memory multiply-and-accumulate operations
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US Patent 11948618 Non-volatile analog resistive memory cells implementing ferroelectric select transistors
0
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US Patent 11507761 Performing complex multiply-accumulate operations
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US Patent 11544547 Accelerating binary neural networks within latch structure of non-volatile memory devices
•••
Patent Inventor Names
Won Ho Choi
0
Martin Lueker-Boden
0
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
10528643
Patent Primary Examiner
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Chuong D. Ngo

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