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US Patent 10535733 Method of forming a nanosheet transistor

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Date Filed
January 11, 2018
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Date of Patent
January 14, 2020
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Patent Application Number
15868003
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Patent Citations Received
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US Patent 12136671 Gate-all-around field-effect transistor having source side lateral end portion smaller than a thickness of channel portion and drain side lateral end portion
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US Patent 11450738 Source/drain regions in integrated circuit structures
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US Patent 11923361 Semiconductor device with isolation structure
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US Patent 11929425 Nanowire stack GAA device with inner spacer
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US Patent 11942513 Semiconductor structure and method of fabricating the semiconductor structure
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US Patent 11996459 Counteracting semiconductor material loss during semiconductor structure formation
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US Patent 12069856 Methods of forming electronic devices using materials removable at different temperatures
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US Patent 11476268 Methods of forming electronic devices using materials removable at different temperatures
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US Patent 11239359 Fabricating a gate-all-around (GAA) field effect transistor having threshold voltage asymmetry by thinning source side lateral end portion of the nanosheet layer
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US Patent 10930498 Methods for producing nanowire stack GAA device with inner spacer
•••
Patent Inventor Names
Kangguo Cheng
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Peng Xu
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Choonghyun Lee
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Juntao Li
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
10535733
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Patent Primary Examiner
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Andy Huynh
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