US Patent 10553279 Semiconductor memory device

A semiconductor memory device includes nonvolatile memory cells. A first circuit is configured to receive data to be written to the plurality of memory cells, read data from the plurality of memory cells, compare the data to be written to the data that was read, identify each memory cell presently storing a data value that differs from a data value to be written, and identify weak bit data in the existing data. A second circuit is configured to simultaneously program the weak bits and memory cells identified as presently storing the data value that differs from the data value to be written to the memory cell.