US Patent 10559751 Bottom electrode for semiconductor memory device
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Patent abstract
A conductive microstud is formed in a recess of an insulator layer formed on the substrate. A bottom pedestal is formed on a top surface of the microstud. The material used for the bottom pedestal has a lower electrochemical voltage than a material used for the microstud. A top pedestal is formed on a top surface of the bottom pedestal. The top surface of at least one of the bottom pedestal and top pedestal is planarized. A conductive layer is formed on a top surface of the top pedestal. Next, a conical structure is formed. The conical structure is comprised of at least the conductive layer and a top portion of the top pedestal.
Edits on 27 Mar, 2023
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Patent Jurisdiction
Patent Number
105597510
Date of Patent
February 11, 2020
0Patent Application Number
161393330
Date Filed
September 24, 2018
0Patent Citations Received
Patent Primary Examiner
Edits on 24 Sep, 2022
Golden AI
Infobox
Is a
Patent Jurisdiction
Patent Number
105597510
Date of Patent
February 11, 2020
0Patent Application Number
161393330
Date Filed
September 24, 2018
0Patent Citations Received
Patent Primary Examiner
Edits on 30 Mar, 2022
Golden AI
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Patent citations received
Edits on 1 Feb, 2022
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US Patent 10559751 Bottom electrode for semiconductor memory device
Infobox
Is a
Patent jurisdiction
Patent number
10559751
Date of patent
February 11, 2020
Patent application number
16139333
Date Filed
September 24, 2018
Patent primary examiner
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