Patent attributes
A gate drive circuit and a display device are provided. The gate drive circuit comprises: a first stage that outputs a first gate pulse at a first output terminal by increasing a voltage at the first output terminal when a first Q node is charged in response to receiving a first carry signal at a first start terminal, and decreasing the voltage at the first output terminal when a first QB node is charged; and a second stage that outputs a second gate pulse at a second output terminal and outputs a second carry signal at a third output terminal by increasing voltages at the second and third output terminals when a second Q node is charged in response to receiving the first carry signal at a second start terminal, and decreasing the voltages at the second and third output terminals when a second QB node is charged.
