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US Patent 10599429 Variable format, variable sparsity matrix multiplication instruction

Patent 10599429 was granted and assigned to Intel on March, 2020 by the United States Patent and Trademark Office.

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Is a

Patent

Patent attributes

Patent Applicant

Intel

Current Assignee

Intel

Patent Jurisdiction

United States Patent and Trademark Office

Patent Number

10599429

Date of Patent

March 24, 2020

Patent Application Number

16003545

Date Filed

June 8, 2018

Patent Citations

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US Patent 10387122 Residue number matrix multiplier

Patent Citations Received

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US Patent 11403562 Determining sectors of a track to stage into cache by training a machine learning module

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US Patent 11062232 Determining sectors of a track to stage into cache using a machine learning module

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US Patent 11288600 Determining an amount of data of a track to stage into cache using a machine learning module

Patent Primary Examiner

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Cheng Yuan Tseng

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