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US Patent 10658174 Atomic layer deposition and etch for reducing roughness

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Infobox (-1 properties)
Infobox
Official Website
https://pdfpiw.uspto.gov/.piw?Docid=106581740
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Infobox
Is a
Patent
Patent
0
Patent Applicant
Lam Research
Lam Research
0
Current Assignee
Lam Research
Lam Research
0
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
0
Patent Number
106581740
Date of Patent
May 19, 2020
0
Patent Application Number
158201100
Date Filed
November 21, 2017
0
Official Website
https://pdfpiw.uspto.gov/.piw?Docid=106581740
Patent Citations
‌
US Patent 10074543 High dry etch rate materials for semiconductor patterning applications
0
‌
US Patent 10170323 Technique to deposit metal-containing sidewall passivation for high aspect ratio cylinder etch
0
‌
US Patent 10170324 Technique to tune sidewall passivation deposition conformality for high aspect ratio cylinder etch
0
‌
US Patent 10297459 Technique to deposit sidewall passivation for high aspect ratio cylinder etch
0
‌
US Patent 10304693 Technique to deposit sidewall passivation for high aspect ratio cylinder etch
0
‌
US Patent 10373840 Technique to deposit sidewall passivation for high aspect ratio cylinder etch
0
‌
US Patent 10431458 Mask shrink layer for high aspect ratio dielectric etch
0
‌
US Patent 10446394 Spacer profile control using atomic layer deposition in a multiple patterning process
0
Patent Citations Received
‌
US Patent 11011388 Plasma apparatus for high aspect ratio selective lateral etch using cyclic passivation and etching
0
Patent Primary Examiner
‌
Bo Fan
0
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Infobox (+1 properties)
Infobox
Website URL
https://pdfpiw.uspto.gov/.piw?Docid=10658174
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Edits made to:
Infobox (+17 properties)
‌

 US Patent 10658174 Atomic layer deposition and etch for reducing roughness

Infobox
Is a
Patent
Patent
Patent applicant
Lam Research
Lam Research
Current assignee
Lam Research
Lam Research
Patent jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent number
10658174
Date of patent
May 19, 2020
Patent application number
15820110
Date Filed
November 21, 2017
Patent citations
‌
US Patent 10074543 High dry etch rate materials for semiconductor patterning applications
‌
US Patent 10170323 Technique to deposit metal-containing sidewall passivation for high aspect ratio cylinder etch
‌
US Patent 10170324 Technique to tune sidewall passivation deposition conformality for high aspect ratio cylinder etch
‌
US Patent 10297459 Technique to deposit sidewall passivation for high aspect ratio cylinder etch
‌
US Patent 10304693 Technique to deposit sidewall passivation for high aspect ratio cylinder etch
‌
US Patent 10373840 Technique to deposit sidewall passivation for high aspect ratio cylinder etch
‌
US Patent 10431458 Mask shrink layer for high aspect ratio dielectric etch
‌
US Patent 10446394 Spacer profile control using atomic layer deposition in a multiple patterning process
Patent primary examiner
‌
Bo Fan

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