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US Patent 10720936 ADC reconfiguration for different data rates
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Patent
Current Assignee
eTopus Technology
Date Filed
July 22, 2019
Date of Patent
July 21, 2020
Patent Applicant
eTopus Technology
Patent Application Number
16518504
Patent Citations Received
US Patent 11374601 Interleaving ADC error correction methods for Ethernet PHY
US Patent 11489540 ADC slicer reconfiguration for different channel insertion loss
US Patent 11515883 Configuration of ADC data rates across multiple physical channels
US Patent 11658671 Latency reduction in analog-to-digital converter-based receiver circuits
0
US Patent 11695425 ADC slicer reconfiguration for different channel insertion loss
0
US Patent 11469785 Receiver circuit with interference detection
US Patent 10868556 Apparatus for calibrating a time-interleaved analog-to-digital converter
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
10720936
Patent Primary Examiner
Metasebia T Retebo
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