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US Patent 10796198 Adjusting enhancement coefficients for neural network engine

Patent 10796198 was granted and assigned to Western Digital on October, 2020 by the United States Patent and Trademark Office.

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Patent Citations Received
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US Patent 12118463 Weight value decoder of neural network inference circuit
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US Patent 11995533 Executing replicated neural network layers on inference circuit
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US Patent 11941533 Compiler for performing zero-channel removal
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US Patent 11921561 Neural network inference circuit employing dynamic memory sleep
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US Patent 11886979 Shifting input values within input buffer of neural network inference circuit
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US Patent 11868901 Compiler for optimizing memory allocations within cores
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US Patent 11783167 Data transfer for non-dot product computations on neural network inference circuit
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Official Website
https://pdfpiw.uspto.gov/.piw?Docid=107961980
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US Patent 11625585 Compiler for optimizing filter sparsity for neural network implementation configuration
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Infobox
Is a
Patent
Patent
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Patent Applicant
Western Digital
Western Digital
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Current Assignee
Western Digital
Western Digital
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
107961980
Date of Patent
October 6, 2020
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Patent Application Number
162341660
Date Filed
December 27, 2018
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Official Website
https://pdfpiw.uspto.gov/.piw?Docid=107961980
Patent Citations
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US Patent 10043095 Data structure for CNN based digital integrated circuit for extracting features out of an input image
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US Patent 10083171 Natural language processing using a CNN based integrated circuit
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US Patent 10102453 Natural language processing via a two-dimensional symbol having multiple ideograms contained therein
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Patent Citations Received
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US Patent 11372577 Enhanced memory device architecture for machine learning
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US Patent 11468145 Storage of input values within core of neural network inference circuit
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US Patent 11481612 Storage of input values across multiple cores of neural network inference circuit
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US Patent 11501138 Control circuits for neural network inference circuit
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US Patent 11531727 Computation of neural network node with large input values
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US Patent 11531868 Input value cache for temporarily storing input values
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US Patent 11568227 Neural network inference circuit read controller with multiple operational modes
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US Patent 11586910 Write cache for neural network inference circuit
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US Patent 11604973 Replication of neural network layers
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Patent Primary Examiner
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Duy M Dang
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Patent Citations Received
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US Patent 11604973 Replication of neural network layers
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