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US Patent 10839922 Memory disturb detection
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Patent
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Date Filed
May 26, 2018
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Date of Patent
November 17, 2020
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Patent Application Number
15990617
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Patent Citations Received
US Patent 12068037 Managing sub-block erase operations in a memory sub-system
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US Patent 11587619 Block configuration for memory device with separate sub-blocks
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US Patent 11335412 Managing sub-block erase operations in a memory sub-system
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US Patent 11501840 Proximity disturb remediation based on a number of programmed memory cells
Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
10839922
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Patent Primary Examiner
Sung Il Cho
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