US Patent 10884705 Approximate mixed-mode square-accumulate for small area machine learning

Multipliers, Multiply-Accumulate (MAC), and Square-Accumulate (SAC) circuits are fundamental building blocks in signal processing, including in emerging applications such as machine learning (ML) and artificial intelligence (AI) that predominantly utilize digital-mode multipliers, MACs, and SACs. Generally, digital multipliers, MACs, and SACs can operate at high speed with high resolution, and synchronously. As the resolution and speed of digital multipliers, MACs, and SACs increase, generally the dynamic power consumption and chip size of digital implementations increases substantially that makes them impractical for some ML and AI segments, including in portable, mobile, near edge, or near sensor applications. The multipliers, MACs, and SACs utilizing the disclosed current mode data-converters are manufacturable in main-stream digital CMOS process, and they can have medium to high resolutions, capable of low power consumptions, having low sensitivity to power supply and temperature variations, as well as operating asynchronously, which makes them suitable for high-volume, low cost, and low power ML and AI applications.