Patent attributes
A time to digital converter includes a state transition section configured to start, based on a trigger signal, state transition in which an internal state transitions, a transition-state acquiring section configured to acquire, in synchronization with a reference signal, state information from the state transition section and hold the state information, and an arithmetic operation section configured to calculate, based on the state information, a time digital value corresponding to the number of times of transition of the internal state. The state transition section includes a tapped delay line to which a plurality of delay elements are coupled, a logic circuit, and a state machine. The state information is represented by count information output from the state machine and propagation information output from the tapped delay line. A hamming distance of the state information before and after the state transition is 1. A time from when the internal state transitions from a first internal state to a second internal state until when the internal state reverts to the first internal state is longer than a time interval for updating the state information held by the transition-state acquiring section.
