Patent attributes
Enhanced error correction for data stored in storage devices are presented herein. An error correction circuit decodes an encoded data segment retrieved from a storage media. This decode uses a selected error correction scheme having an error correction limit. The error correction circuit tracks a number of bit corrections made to the encoded data segment during decode. A detection circuit sends a redundant version of the encoded data segment to the error correction circuit in response to the number of bit corrections satisfying a threshold limit set below the error correction limit to mitigate undetected errors in decoding the encoded data segment. An output circuit can transfer resultant data decoded by the error correction circuit to other systems, such as a host device.