US Patent 10902894 Semiconductor devices

A semiconductor device includes a column control circuit and a core circuit. The column control circuit generates a read column signal and a write column signal from a read bank address signal and a write bank address signal in response to a read latch pulse and a write latch pulse, which are generated during a masked write operation. The core circuit is configured to include a plurality of banks. Any one of the plurality of banks is activated by the read column signal and the write column signal to perform an internal read operation and a write operation.