US Patent 10923317 Detecting defects in a logic region on a wafer
Patent 10923317 was granted and assigned to KLA on February, 2021 by the United States Patent and Trademark Office.
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Methods and systems for detecting defects in a logic region on a wafer are provided. One method includes acquiring information for different types of design-based care areas in a logic region of a wafer. The method also includes designating the different types of the design-based care areas as different types of sub-regions and, for a localized area within the logic region, assigning two or more instances of the sub-regions located in the localized area to a super-region. In addition, the method includes generating one scatter plot for all of the two or more instances of the sub-regions assigned to the super-region. The one scatter plot is generated with different segmentation values for the output corresponding to the different types of the sub-regions. The method further includes detecting defects in the sub-regions based on the one scatter plot.
US Patent 10923317 Detecting defects in a logic region on a wafer
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