Patent attributes
A memory system that includes an error check and correct (ECC) circuit is provided. The memory system includes a memory, a circuit, and a processor. The memory system has a function of receiving write data from the outside. The memory includes a user data region, a first management region, and a second management region. The user data region stores the write data. The circuit has a function of performing ECC processings on the write data read from the user data region. The first management region stores data that indicates whether the user data region has stored the write data or not. The second management region stores data that indicates whether the circuit has performed the ECC processings on the write data read from the user data region or not.
