Patent 10949297 was granted and assigned to Micron Technology on March, 2021 by the United States Patent and Trademark Office.
Devices and techniques for NAND device mixed parity management are described herein. A first portion of data that corresponds to a first data segment and a second data segment—respectively defined with respect to a structure of a NAND device—are received. A parity value using the first portion of data and the second portion of data is computed and then stored for error correction operations.