Patent attributes
A photodiode array circuit includes a plurality of photodiode circuits, binning circuitry, and a plurality of output circuits. Each of the plurality of photodiode circuits is coupled to receive a different one of the plurality of transfer control signals as a proximate photodiode circuit, proximate in a first direction. The binning circuitry is coupled to electrically connect the plurality of photodiode circuits into groups of photodiode circuit sense nodes in response to a binning control signal. Each of the plurality of output circuits is coupled to one of the groups of photodiode circuit sense nodes. Each of the plurality of output circuits are coupled to receive the output charge from the photodiode circuits in the one of the groups of photodiode circuit sense nodes and output an output signal to a bitline in response to the output charge and an row select signal.
