Patent attributes
An offset component of multiplication by a transistor is to be reduced. An imaging device includes a pixel region, a first circuit, a second circuit, a third circuit, and a fourth circuit. The pixel region includes a plurality of pixels, and a pixel includes a first transistor. An offset potential and a weight potential are supplied to the pixel selected by the first circuit and the second circuit. The pixel obtains a first signal by photoelectric conversion with use of light. The first transistor multiplies the first signal by the weight potential. The first transistor generates a first offset term and a second offset term with use of a multiplication term of the first signal by the weight potential and the offset potential. The third circuit subtracts the first offset term, and the fourth circuit subtracts the second offset term. The fourth circuit determines the multiplication term, and the fourth circuit outputs a determination result through the neural network interface.
