Patent attributes
A low-dropout (LDO) regulator and an associated method and apparatus are described. The LDO regulator generally includes a first transistor coupled between an input voltage node and an output voltage node of the LDO regulator. The LDO regulator further includes a first amplifier having an output coupled to a gate of the first transistor, wherein a feedback path couples the output voltage node to an input of the first amplifier. The LDO regulator further includes a second amplifier having an output coupled to an enable input of the first amplifier, wherein a voltage-sensing path couples the input voltage node to an input of the second amplifier. The LDO regulator further includes and a second transistor coupled between the gate of the first transistor and a reference potential node, the output of the second amplifier being coupled to a gate of the second transistor.