Patent 11004955 was granted and assigned to Taiwan Semiconductor Manufacturing Company on May, 2021 by the United States Patent and Trademark Office.
A semiconductor device includes a gate structure located on a substrate; and a raised source/drain region adjacent to the gate structure. An interface is between the gate structure and the substrate. The raised source/drain region includes a stressor layer providing strain to a channel under the gate structure; and a silicide layer in the stressor layer. The silicide layer extends from a top surface of the raised source/drain region and ends below the interface by a predetermined depth. The predetermined depth allows the stressor layer to maintain the strain of the channel.