US Patent 11018186 Multi-level memristor elements
Patent 11018186 was granted and assigned to Cirrus Logic on May, 2021 by the United States Patent and Trademark Office.
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Patent abstract
There is described a two-terminal multi-level memristor element synthesised from binary memristors, which is configured to implement a variable resistance based on unary or binary code words. There is further described a circuit such as a synapse circuit implemented using a multi-level memristor element.
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Patent Inventor Names
John Paul Lesso0
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Patent Number
110181860
Date of Patent
May 25, 2021
0Patent Application Number
167811570
Date Filed
February 4, 2020
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US Patent 11018186 Multi-level memristor elements
Infobox
Is a
Patent applicant
Current assignee
Patent jurisdiction
Patent number
11018186
Date of patent
May 25, 2021
Patent application number
16781157
Date Filed
February 4, 2020
Patent citations
Patent primary examiner
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