Patent attributes
Various methods and circuital arrangements for biasing gates of stacked transistors of a cascode amplifier are presented, where the amplifier is configured to operate according to different modes of operation. Such circuital arrangements operate in a closed loop with a feedback voltage that is based on a sensed voltage at one or more nodes of a replica circuit of the stacked transistors, the amplifier and the replica circuit biased with same gate voltages. According to one aspect, one gate voltage is adjusted based on a comparison of the feedback voltage with a reference voltage, and other gate voltages are derived by offsetting of the one gate voltage with voltages generated by a current flow through a resistive ladder network.