Is a
Patent attributes
Patent Jurisdiction
Patent Number
Date of Patent
June 15, 2021
Patent Application Number
16782926
Date Filed
February 5, 2020
Patent Citations
...
Patent Primary Examiner
Patent abstract
An illustrative integrated circuit and method providing on-chip jitter evaluation. One illustrative integrated circuit embodiment includes a digital receiver having a timing recovery circuit that determines a phase offset signal from estimated timing errors of previous sampling instants; and an on-chip memory that captures the phase offset signal, the on-chip memory being coupled to a processor that derives one or more jitter measurements from the phase offset signal. For initial calibration, the processor may configure the receiver for loop back operation, and thereafter the calibration values may enable evaluation of remote transmitter clock jitter.
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