Patent attributes
A memory controller includes, in one embodiment, a memory interface and a dynamic stripe length manager circuit configured to receive a first weighted health factor associated with a first memory block of the memory, determine a first collective stripe length of the first memory block based on the first weighted health factor, set a first number of zones in the first memory block based on the first collective stripe length, monitor the memory to detect a trigger event that triggers a calculation of a second collective stripe length of the first memory block, the second collective stripe length being larger than the first collective stripe length, receive a second weighted health factor associated with the first memory block, determine the second collective stripe length based on the second weighted health factor, and set a second number of zones in the first memory block based on the second collective stripe length.