A memory device includes a memory cell array including a plurality of memory cells; a peripheral circuit configured to perform a program operation on selected memory cells among the plurality of memory cells; a program pulse information generator configured to generate program pulse information indicating whether a number of program pulses applied to the selected memory cells during the program operation has exceeded a reference value; and a status register configured to store status information and the program pulse information, wherein the memory device provides the status information and the program pulse information to an external controller in response to a command from the external controller.