US Patent 11063793 Serial receiver equalization circuit

An equalization circuit includes a feed-forward equalization (FFE) circuit and a decision feedback equalization (DFE) circuit. The FFE circuit includes a first FFE tap, a second FFE tap coupled to the first FFE tap, and a variable gain amplifier. The variable gain amplifier includes an input and a programmable capacitor. The input is coupled to the first FFE tap and the second FFE tap. The programmable capacitor is coupled to the input. The DFE circuit includes an input and a DFE tap. The input is coupled to the variable gain amplifier. The DFE tap is coupled to the input of the variable gain amplifier.