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US Patent 11126464 Using cache coherent FPGAS to accelerate remote memory write-back

Patent 11126464 was granted and assigned to VMware on September, 2021 by the United States Patent and Trademark Office.

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Patent
Patent
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Patent attributes

Patent Applicant
VMware
VMware
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Current Assignee
VMware
VMware
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
111264640
Patent Inventor Names
Aasheesh Kolli0
Irina Calciu0
Jayneel Gandhi0
Pratap Subrahmanyam0
Date of Patent
September 21, 2021
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Patent Application Number
201807270
Date Filed
July 27, 2018
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Patent Citations Received
‌
US Patent 12008361 Coherence-based dynamic code rewriting, tracing and code coverage
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Patent abstract

Disclosed is a method for performing write-back operations to maintain coherence of remote memories in a memory pool. When a local application makes a request for a page of memory that is in the memory pool but not local, a device obtains the page through its RDMA facility and thereafter keeps track of the page for any changes made by the application to the page by storing the page locally and monitoring cache coherency events of cache lines that make up the page. If a requested page become dirty, then periodically the dirty cache lines of the dirty page are written back to the remote memory from which the pages were obtained. In addition, all dirty cache lines are written back when the local memory storing the page becomes full or the application closes a region containing the page.

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