Patent attributes
A network packet receiving device that includes packet queues, a credit allocation circuit and a credit management circuit is provided. Each of the packet queues corresponds to a packet transmission channel and receives packets. The credit allocation circuit calculates packet amount of each of the packet queues to control the descriptor credit of each of the packet queues within a credit range. The credit management circuit points each of public entries of a public link list to one of descriptors in a single descriptor buffer. The credit management circuit further receives a credit requesting command from the packet queues to assign the descriptors to the packet queues through the public entries under the condition that the descriptor credit is within a credit range such that a DMA circuit performs a DMA operation on the packets according to the descriptors.
