Patent attributes
A display device includes: a plurality of sub-pixels each including a memory block that includes a plurality of memories each of which is configured to store sub-pixel data; a plurality of memory selection line groups provided to respective rows and each including a plurality of memory selection lines electrically coupled to the corresponding memory blocks in the sub-pixels that belong to a corresponding row; a memory selection circuit configured to simultaneously output a memory selection signal to the memory selection line groups, the memory selection signal being a signal for selecting one from the plurality of memories in each of the memory blocks. In accordance with the memory selection lines supplied with the memory selection signal, the sub-pixels display an image based on the sub-pixel data stored in memories in the respective sub-pixels, the memories each being one of the plurality of memories in the corresponding sub-pixel.
