US Patent 11164626 Methods and systems for accessing memory cells

A method for reading memory cell, comprising the steps of applying a first read voltage to a plurality of memory cells, detecting first threshold voltages exhibited by the plurality of memory cells in response to application of the first read voltage, based on the first threshold voltages, associating a first logic state to one or more cells of the plurality of memory cells, applying a second read voltage to the plurality of memory cells, wherein the second read voltage has the same polarity of the first read voltage and a higher magnitude than an expected highest threshold voltage of memory cells in the first logic state, detecting second threshold voltages exhibited by the plurality of memory cells in response to application of the second read voltage, based on the second threshold voltages, associating a second logic state to one or more cells of the plurality of memory cells, applying a third read voltage to the plurality of memory cells, wherein the third read voltage has the same polarity of the first and second read voltages and is applied at least to a group of memory cells that, during the application the second read voltage, have been reprogrammed to an opposite logic state, detecting third threshold voltages exhibited by the plurality of memory cells in response to application of the third read voltage, and based on the third threshold voltages, associating one of the first or second logic state to one or more of the cells of the of the plurality of memory cells. A related circuit, a related memory device and a related system are also disclosed.