Patent attributes
A packet switch includes an ingress port; queue admission control circuitry connected to the ingress port; one or more egress queues configured to manage packet buffers; and an egress port connected to the packet buffers, wherein the packet buffers are managed such that already queued lower priority packets are discarded from the packet buffers when it is required to drop higher priority packets that should otherwise be accepted in the packet buffers. The queue admission control circuitry can be configured to determine if a packet should be dropped or not, and the queue admission control circuitry communicates to buffer reallocation circuitry that is configured to discard one or more lower priority packets to support enqueuing the higher priority packet.
