US Patent 11176992 Memory write operation apparatus and method

The present disclosure discloses a memory write operation apparatus to perform write operation on a selected memory unit coupled to two bit lines that includes a coupling capacitor, a charge sharing circuit, a write operation driving circuit, a charging circuit and a negative voltage coupling circuit. The charge sharing circuit electrically couples a first terminal of the coupling capacitor and a first bit line to receive charges therefrom to perform charging. The negative voltage coupling circuit electrically couples the first terminal of the coupling capacitor to a ground terminal during a negative voltage generation time period such that a second terminal of the coupling capacitor couples a negative voltage to the first bit line to perform write operation.