US Patent 11177813 Phase-locked loop circuit, control method thereof and electronic device

A phase-locked loop circuit is provided, including: a phase frequency comparing unit to compare phase of an external reference clock signal and phase of a comparing clock signal, and generate an error signal corresponding to the comparing result; an oscillation unit to generate an internal clock signal having oscillation frequency corresponding to the error signal; a frequency dividing unit to divide frequency of the internal clock signal according to a pre-set dividing ratio, to generate the comparing clock signal; a control unit to generate a control signal to respectively change connection of the oscillation unit and connection of the frequency dividing unit after phase comparing. The phase-locked loop circuit can detect and correct mistaken locking and harmonic locking. There is no need to reset the circuit when mistakenly locked, sudden output phase change and additional spike signal that affecting the integrity of the clock signal are prevented.