Patent attributes
A semiconductor device and a method of manufacturing a semiconductor device capable of suppressing breakdown due to current concentration while suppressing an increase in chip size are provided. According to one embodiment, a semiconductor device has a gate resistance on a main surface side of a semiconductor substrate, a first contact and a second contact connected to an upper surface of the gate resistance, and a carrier discharging portion that discharges the carrier formed in the semiconductor substrate below the gate resistance, the gate resistance having a first contacting portion to which a first contact is connected, a second contacting portion to which a second contact is connected, and a plurality of extending portions with one end connected to the first contacting portion and the other end connected to the second contacting portion. The gate resistance forms an opening between adjacent extending portions and the carrier discharge portion is formed in the opening.
