Patent attributes
A computer-implemented method is provided for use with a reconfigurable computational device having a collection of computing nodes arranged in a mesh of N×M×Z topology, the computing nodes including computational hardware, wherein Z<N and Z<M, and wherein N and M are at least equal to 4. The method includes using the computational device to perform computations characterized by (i) an initial system I/O bandwidth and (ii) an initial system node-to-node latency; reconfiguring the device into a mesh of N′×M′×Z′ topology, wherein at least two of N, M, and Z values are different from their corresponding N′, M′, and Z′ values, and wherein N×M×Z is equal to N′×M′×Z′; and using the device to perform computations characterized by (i) a modified system I/O bandwidth and (ii) a modified system node-to-node latency.
