Patent attributes
The display panel includes an array substrate, and the array substrate includes pixel circuits arranged in an array. A first initialization module and a second initialization module are connected in series to an initialization signal terminal and a control terminal of the drive module, an output terminal of the second initialization module is electrically connected to the control terminal of the drive module; a control terminal of the first initialization module is used for receiving a first additional scan signal, and a control terminal of the second initialization module is used for receiving a first scan signal. Within at least one light emitting period of one frame duration, the end time of an active level pulse of the first additional scan signal is later than the end time of an active level pulse of the first scan signal.