US Patent 11189713 Nanosheet transistor having wrap-around bottom isolation

Embodiments of the invention are directed to a method of performing fabrication operations to form a nanosheet field effect transistor (FET) device. The fabrication operations include forming a sacrificial structure over a substrate, wherein the sacrificial structure includes a central region, a first leg at a first end of the central region, and a second leg at a second end of the central region. A nanosheet stack is formed over the central region. An isolation material is deposited within a space that was occupied by the sacrificial structure to form a wrap-around bottom dielectric isolation (BDI) structure having a BDI central region, a first BDI leg at a first end of the BDI central region, and a second BDI leg at a second end of the BDI central region.