Patent attributes
Disclosed is a physical unclonable function generator circuit and testing method. In one embodiment, a physical unclonable function (PUF) generator, includes: a PUF cell array comprising a plurality of bit cells configured in at least one column and at least one row, wherein the plurality of bit cells each provides two voltage transient behaviors on two corresponding bit lines of the at least one column; and at least two load control circuits coupled to the two bit lines of the at least one corresponding column, wherein the at least two load control circuits are each configured to provide at least one discharge pathway to at least one of the two corresponding bit lines, wherein the at least one discharge pathway is configured to change at least one of the two voltage transient behaviors so as to determine stability of each of the plurality of bit cells of the PUF cell array.
