Patent attributes
The display panel test circuit includes a first signal line, a first control line and a plurality of switching units, the first signal line comprises a first sub-signal line, a second sub-signal line and a plurality of third sub-signal lines, two ends of each of the third sub-signal lines are connected to the first sub-signal line and the second sub-signal line respectively. Each switching unit includes a first switching device, a control end thereof is connected to the first control line, an input end thereof is connected to the first sub-signal line, the output end of the first switching device is a test signal output end of the switching unit to which the first switching device belongs, and a portion of the first sub-signal line between any two adjacent switching units is connected to at least one third sub-signal line.