US Patent 11237617 Arbitration techniques for managed memory

Devices and techniques for arbitrating operation of memory devices in a managed NAND memory system to conform the operation to a power budget. In an example, a method can include receiving an operation change indication for a NAND memory operation at power management circuitry of a NAND memory system, and summing a power credit to a value of a first register associated with the operation change indication to provide an indication of instantaneous power consumption of the NAND memory system as the value of the first register.