US Patent 11277134 Semiconductor memory device

According to one embodiment, a semiconductor memory device includes: a memory cell array and a signal propagation circuit disposed on a propagation path of a signal or a control signal, wherein the signal propagation circuit includes: a first inverted signal output circuit; a second inverted signal output circuit including an input terminal connected to an output terminal of the first inverted signal output circuit; a third inverted signal output circuit including an input terminal connected to output terminals of the first inverted signal output circuit and the second inverted signal output circuit; a fourth inverted signal output circuit including an input terminal connected to an output terminal of the third inverted signal output circuit; and a fifth inverted signal output circuit including an input terminal connected to output terminals of the third inverted signal output circuit and the fourth inverted signal output circuit.