US Patent 11287843 Synchronisation of hardware clock using software clock synchronisation error

A first device operates synchronously with a second device, and includes a hardware clock having an adjustable clock frequency and a software clock configured to derive time in dependence on the hardware clock. A controller determines a synchronisation error between the software clock and a clock of the second device, and adjusts the clock frequency of the hardware clock in dependence on the synchronisation error so as to synchronise the hardware clock to a hardware clock of the second device.