US Patent 11294840 Dual-tree backplane

An information handling system may include at least one processor; a first and a second backplane, wherein the first and second backplanes are Peripheral Component Interconnect Express (PCIe) backplanes; and a physical storage resource. The physical storage resource may be coupled to the at least one processor via a first port of the physical storage resource and via the first backplane, and the physical storage resource may be further coupled to the at least one processor via a second port of the physical storage resource and via the second backplane.